IEEE A-SSCC 2019

IEEE Asian Solid-State Circuits Conference

 News

Date Contents
2019/10/16 Registration for Macau Heritage Tour has been extended to 25 October 2019, please register by or before this date.
2019/10/11 Regarding the template for presentation, please click Here to get PowerPoint (ppt) template which will be used for oral presentation at the conference. The ppt file must follow the 16:9 format at A-SSCC 2019
2019/10/08 Update guideline for FPGA Session Demonstration and Student Design Contest.
2019/09/25 Update information for "Advanced Program", "Conference Schedule", and "Floor Plan".
2019/09/18 There will be a half day post event tour "Macau Heritage" on 7 Nov 2019 morning. This tour will be last for 3 hours to 4 hours and be free of change. Anyone who is interested to join the tour can send email to ASSCC2019 Secretarial Office asscc2019@moxlink.com to register by or before 15 Oct 2019.
2019/09/05 Update Information for "Panel Discussion".
2019/09/04 Speaker Rehearsal schedule is available.
2019/08/31 Registration is open now. For each accepted paper, at least one author must register by September 8, 2019 as "Regular Registration" and provide the respective paper ID# during registration. One registration covers one paper only.
2019/08/27 Guidelines for FPGA Session Demonstration and Student Design Contest are available.
2019/08/23 A-SSCC Student Travel Grant Award will provide stipends of up to US$ 400 to each winner. Moreover, Women in Circuits (WiC) is supporting additional Student Travel Grants for minorities to encourage diversity in our Community. Apply for the award by October 18, 2019.
2019/08/21 Update Information for "Plenary Talks" and "Tutorials".
2019/08/16 Updated Information: "Registration".
2019/06/01 The TPC Paper Review Meeting is on 27 July 2019 in Qingdao.
2019/05/15 The Technical Program Committee Members page have been updated with the complete list of the members.
2019/04/15 On-line paper submission system is open. Please click the following links for the submission guideline and login page. Paper submission deadline is on June 17, 2019.
2019/02/15 A-SSCC 2019 website is live!

 Conference Overview

The IEEE A-SSCC 2019 (Asian Solid-State Circuits Conference) is an international forum for presenting the most updated and advanced chips and circuit designs in solid-state and semiconductor fields. The conference is supported by the IEEE Solid-State Circuits Society and will be held in Asia.

 Conference Theme

Silicon System for Next Smart Society

Solid-state circuits have improved our lives for more than 50 years. There is no doubt that we have benefited from a wide variety of electronic equipment such as mobile computing devices, car electronics and digitalized social infrastructures. Rapid progress of artificial intelligence accelerated by deep learning, in conjunction with big data collected by IoT, may change our lives non-linearly. As a consequence, we will use smarter mobile devices, drive or be driven by, smarter cars and live on a smarter infrastructure, leading to totally different quality of life. There, we will face new challenges and opportunities for silicon systems, which our community should overcome and take advantage of.

 Conference Program

The conference technical program includes 4 plenary talks, 1 panel discussion, 1 industry session, and 4 tutorials. The 84 regular papers are grouped in 17 sessions covering analog circuits, data converters, digital circuits and systems, emerging technology and applications, memory, radio-frequency circuits, system-on-chip and signal processing, wireline and mixed signal circuits. The Student Design Contest will feature demos from the best student papers.

 Plenary Talks

What are the driving forces of DRAM?

Mr. Yiming Zhu

Chairman & CEO, ChangXin Memory Tech., China

  • Date: November 5 (Tuesday)
  • Time: 8:50AM-9:35AM
  • Room: 7401-7403 & 7501-7503

Memory Centric Computing, The Foundation of Next Smart Society

Mr. KyoWon Jin

Exec. VP & General Manager

DRAM Dev & Biz, SK Hynix, Korea.

  • Date: November 5 (Tuesday)
  • Time: 9:35AM-10:20AM
  • Room: 7401-7403 & 7501-7503

AI and IoT for Social Value Creation

Dr. Yasunori Mochizuki

NEC Fellow, NEC, Japan

  • Date: November 6 (Wednesday)
  • Time: 8:30AM-9:15AM
  • Room: 7402-7403 & 7502-7503

Millimeter-Wave System-on-Chip Applications from Space Explorations to Contactless Connectivity

Dr. Mau-Chung Frank Chang

President Emeritus & University Chair Professor, National Chiao Tung University, Hsinchu, Taiwan

Wintek Distinguished Chair Professor, Electrical Engineering, UCLA

  • Date: November 6 (Wednesday)
  • Time: 9:15AM-10:00AM
  • Room: 7402-7403 & 7502-7503
 Panel Discussion
November 5 (Tuesday)

Are Analog and Mixed Mode Circuits the future solution of AI SoCs?

Time: 15:40 – 17:20 (Banquet starts from 18:00)

Abstract:

DNN looks mature already, and Neuromorphic and Spike Neural Network are regarded as the next research area. The current AI SoCs are based on Digital DNN circuits with the limitations from the Von Neumann architecture. Analog/Mixed Mode circuits may implement Neuromorphic SoCs and Spike Neural Network overcoming the Von Neumann bottleneck. Is it true? and if it is, how we can make it?

  • Just ADC/DAC are enough to process AI operations
  • Are Mixed Mode MACs better than Digital MACs?
  • DRAM and SRAM can be the Processing Elements.
  • Non-Volatile Memory is essential to implement Neuromorphic/SNN
  • What kind of circuits do you need for Spike Neural Network?
  • Neuromorphic AI and Mixed Mode Circuits.

Organizer/Co-organizer: Hoi-Jun Yoo, Korea Advanced Institute of Science & Technology, Korea,

Woogeun Rhee, Tsinghua University, China,

Jerald Yoo, NUS, Singapore,

Noriyuki Miura, Kobe Univ., Japan

Moderator: Noriyuki Miura, Kobe Univ., Japan

Panelists / Position:

  1. Mixed Mode AI Trends Overview: Jason Lee (UNIST)
  2. ADC and AI: Vanessa Chen (Carnegie Mellon University)
  3. Mixed Mode MAC: SeungTak Ryu (KAIST)
  4. Memory Based Analog AI: ShouYi Yin (Tsinghua)
  5. Non-Volatile Memory and Analog AI: Yongpan Liu(Tsinghua)
  6. Spike Neural Network: Samuel Tang(National Tsinghua)
  7. Neuromorphic: Hiromitsu Awano (Osaka Univ.)
 Tutorials

Tutorial 1: On-Chip Millimeter Wave Voltage Measurements for Debugging, Built-in Self-Test and Self-Healing

Prof. Kenneth O(Univ. of Texas, Dallas)

  • Date: November 4 (Monday)
  • Time: 9:00AM – 10-:30AM
  • Room: 7404 & 7504

Tutorial 2: AI Computing: What it is about & How hardware can help it out

Prof. Masato Motomura(Tokyo Inst. of Tech.)

  • Date: November 4 (Monday)
  • Time: 10:50AM – 12:20PM
  • Room: 7404 & 7504

Tutorial 3: Bringing back Pipelined ADCs in the Era of SAR ADCs

Prof. Seung-Tak Ryu (KAIST)

  • Date: November 4 (Monday)
  • Time: 13:40PM– 15:10PM
  • Room: 7404 & 7504

Tutorial 4: Nonvolatile Logic and Computing-in-Memory for AI Edge Chips

Prof. Meng-Fan Chang(National Tsing Hua Univ.)

  • Date: November 4 (Monday)
  • Time: 15:30PM– 17:00PM
  • Room: 7404 & 7504
 Regular Session Schedule

Day Two (Nov. 5, 2019)
Nov. 5, 2nd Day. Tuesday. 10 :50-12 :30
(100 min)
Session 2
Industry Program High Performance Technologies for Industrial Applications
Session 3
Secure and Smart Computing Systems
13 :30-15 :10
(100 min)
Session 4
Power Management Techniques
Session 5
Low Power Deep Learning Processor
Session 6
RF & mm-Wave Front-end Circuits and Clock Generator
Session 7
Advanced Clock Generators
15 :40-17 :20
(100 min)
Session 8
Panel Discussion
“Are Analog and Mixed Mode Circuits the future solution of AI SoCs?”
Moderator: Prof. Miura, Kobe Univ., Japan

Day Three (Nov. 6, 2019)

Nov. 6, 3rd Day. Wednesday

10 :30-12 :35

(125 min)

Session 10

Sensor Interfaces and Data Converters

Session 11

Advanced Energy-efficient Digital Circuits

Session 12

RF, mm-Wave & THz Transmitters and Receivers
Session 13
Energy-Aware Circuits & Systems

13 :40-15 :20

(100 min)

Session 14

ADC Techniques

Session 15

Intelligent System on FPGA

Session 16

Intelligent Memory
Session 17
High-speed Wireline Receiver Techniques

15 :50-17 :30

(100 min)
Session 18
Capacitive Power Converters

Session 19

Low Power SoC for IoT

Session 20

RF Signal Synthesizers
Session 21
Biomedical Sensor Interfaces

 Registration Fee

Category

Early Bird

Regular Registration

On-Site Registration

Author

Must register by

September 8, 2019

Non-Author

On & Before

October 11, 2019

On & After

October 11, 2019

Regular – IEEE Member

MOP5,200 (USD650)

MOP6,000 (USD750)

MOP6,400 (USD800)

Regular – IEEE SSCS Member

MOP4,800 (USD600)

MOP5,600 (USD700)

MOP6,000 (USD750)

Regular – Non-Member

MOP6,400 (USD800)

MOP7,200 (USD900)

MOP7,600 (USD950)

Student – IEEE Member

MOP2,600 (USD325)

MOP3,400 (USD425)

MOP3,800 (USD475)

Student – IEEE SSCS Member

MOP2,400 (USD300)

MOP3,200 (USD400)

MOP3,600 (USD450)

Student – Non-Member

MOP3,000 (USD375)

MOP3,800 (USD475)

MOP4,200 (USD525)

IEEE Life Fellow

MOP2,600 (USD325)

MOP3,400 (USD425)

MOP3,800 (USD475)

IMPORTANT – Please note that:

For each accepted paper, at least one author must register by September 8, 2019 as "Regular Registration" and provide the respective paper ID# during registration. One registration covers one paper only.

Each regular registration includes 1 conference proceedings and access to all sessions, coffee breaks, welcome reception, banquet and 2 days lunch.

Each student registration includes all the items in regular registration except the banquet.

Extra banquet tickets can be purchased in registration.

IEEE Member Registration: To qualify for the member rate, your IEEE Membership number is required.

SSCS Member Registration: To qualify for the member rate, your IEEE Membership number is required.

Student Registration: To qualify for the student rate, a proof of current full-time student status (i.e., a copy of student card or certification from your university) is required.

  • Please make payment only in USD Dollar or Macau Patacas into the Bank Account in Macau.
  • For on-site registration and payment, only cash (MOP) is accepted.
  • USD1.00 = MOP8.00

Category

Early Bird

Regular Registration

On-Site Registration

Author
Must register by September 8, 2019

Non-Author
On & Before Sept 30, 2019

On & After October 1, 2019

Regular – IEEE Member

MOP5,200 (USD650)

MOP6,000 (USD750)

MOP6,400
(USD800)

Regular – IEEE SSCS Member

MOP4,800 (USD600)

MOP5,600 (USD700)

MOP6,000 (USD750)

Regular – Non-Member

MOP6,400 (USD800)

MOP7,200
(USD900)

MOP7,600 (USD950)

Student – IEEE Member

/

MOP2,600 (USD325)

MOP3,400
(USD425)

MOP3,800
(USD475)

Student – IEEE SSCS Member

/

MOP2,400 (USD300)

MOP3,200 (USD400)

MOP3,600
(USD450)

Student – Non-Member

/

MOP3,000
(USD375)

MOP3,800
(USD475)

MOP4,200 (USD525)

IEEE Life Fellow

/

MOP2,600
(USD325)

MOP3,400
(USD425)

MOP3,800
(USD475)

 Tutorial Registration Fees

Category

1 Session

2 Sessions

Full Day (4 Sessions)

Regular

MOP800 (USD100)

MOP1,360 (USD170)

MOP2,400 (USD300)

Student

Free

Free

Free

Notices:

Each regular tutorial registration includes the tutorial materials and access to the sessions which were paid.

Each student tutorial registration includes all the items in regular registration except the tutorial materials.

Student Tutorial Registration: To qualify for the student rate, a proof of current full-time student status (i.e., a copy of student card or certification from your university) is required.

Extra tutorial materials can be purchased in registration.

 Extra Purchases

Category

Rate

Extra Banquet Ticket

MOP800 (USD100)

Extra Tutorial Materials (Get Materials of 4 Sessions)

MOP400 (USD50)

 

 Past Conferences

Following are the website links for the past conferences.

2018 2017 2016 2015 2014 2013 2012
2011 2010 2009 2008 2007 2006 2005